Microprocessors intended for graphics applications must be able to move pixel information between memory bit maps as quickly as possible. In situations where many pixels must be transferred to a bit map, the transfer may be speeded up by using a block-write feature. Typically, a block-write is created by associating a color register with each VRAM, filling the color register with bits to determine the desired color value of selected portions of the VRAM, and then using both the address bits of the VRAM as well as the data bus input to the VRAM to determine the locations within the VRAM where the color represented by the value in the color register will appear. This technique does not burden the data bus with multiple copies of the same pixel value and thus increases the available memory bandwidth, again speeding up data transfers.
The simplest application where the block-write can be used to advantage is the fill, which transfers the same pixel value into a defined area of memory. Also, some forms of data expansion are well suited to the application of block-write techniques. Thus, when a bit map is stored in compressed form the 1's and 0's can represent the presence or absence of a pixel and block-writes can be used to decompress the bit map. Typically, this sort of expansion is applied to character fonts which are often stored in compressed form to save memory.
Problems arise because memory accesses must be made in regular mode and in block-write mode via the same bus and they must be consistent such that data written (or read) in one mode must be able to be read (or written) in the other mode. This problem is addressed in U.S. patent application Ser. No. 898,398, referenced above and incorporated by reference herein.
Another problem occurs where interleaving banks of memories are used. An interleaved memory is one in which banks of memory are arranged such that the least bit (or bits) of the word address are used to select between the banks. For example, in a 32-bit data bus system, with two interleaved banks, the first thirty-two bits of data are contained in the first bank of memory and the next thirty-two bits of data are contained in the second bank of memory. The third 32-bits of data are contained in the first bank and the fourth 32-bits are contained in the second bank. Hence, the bank where the data is contained alternates every other word (in this example, 32-bit words are used).
One way to think of an interleaved memory is a 64-bit wide memory bank, wherein the processor can only access 32-bits of data at a time, so the data bus goes to both halves. The half actually accessed by the processor in any one cycle is determined by the least significant bit of the address.
Interleaving is generally used in graphic systems in order to make possible a higher pixel bandwidth. With two-way interleaving, 64-bits of pixel data are available every shift clock cycle. This high data rate is needed to support high resolution screens.
In block-write mode, however, the processor tries to address and control one hundred twenty-eight consecutive bits (four 32-bit words) in a single cycle. The 128-bits will be spread out between two banks, bits 0-31 and 64-95 in bank0 and 32-63 and 96-127 in bank1. At 8-bit/pixel, pixel 0 and pixel 4 are in the same memory locations within each bank, and thus cannot be controlled individually during the same cycle. If both banks are enabled to be written to, which they must be to access one hundred twenty-eight consecutive bits, then the same data will go into both banks. Control of individual pixels and different banks would thus be impossible.
Therefore, a need exists in the art for a method of supporting interleaved memory banks in a block-write mode.